Business Wire

Keithley Adds Support for Non-Volatile Memory, Very Low Frequency C-V, and Increased Parallel Testing to Semiconductor Parameter Analyzer

CLEVELAND--(BUSINESS WIRE)--Keithley Instruments, Inc., a world leader in advanced electrical test instruments and systems, has introduced a variety of enhancements for its award-winning Model ...
Semiconductor Engineering

Finally, Realizing The Full Benefits Of Parallel Site-To-Site (S2S) Testing

A very common and well-known practice by manufacturers during the IC test process is to test as many of the device die or packaged parts as possible in parallel (i.e. sites) during wafer sort and ...
Business Wire

Keysight’s New Parallel Parametric Test System Delivers High Throughput and Cost-Effective Wafer Test

SANTA ROSA, Calif.--(BUSINESS WIRE)--Keysight Technologies, Inc. (NYSE: KEYS), a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to ...
EDN

Open architecture supports parallel test

As the transistor geometry shrinks, more transistors are packed on to a single chip, reducing manufacturing cost on a per-transistor basis. The result, however, is more transistors to test; hence, ...
Semiconductor Engineering

Promises and Perils of Parallel Test

Testing multiple devices at the same time is not providing the equivalent reduction in overall test time due to a combination of test execution issues, the complexity of the devices being tested, and ...